1. Field
One embodiment of the invention relates to a semiconductor integrated device and a method of testing a semiconductor integrated device.
2. Description of the Related Art
Conventionally, a testing method such as a scan test has been known as a method of testing whether a manufactured LSI operates normally. According to the scan test, flip-flops (FF) in a circuit are connected like a chain to form a scan chain. A scan data pattern is input from a scan input terminal (scan-in). The input data is processed in an internal circuit, and resulting data is output from a scan output terminal (scan-out). The resulting output is observed, and thereby, it is possible to detect a defective portion of the LSI.
Jpn. Pat. Appln. KOKAI Publication No. 2004-117029 discloses a semiconductor integrated circuit and a method of testing the semiconductor integrated circuit which provides a scan test without reducing security. According to the above scan test, based on a rise edge of a scan mode signal, a value set in a flip-flop is reset when a scan mode is set, and the inside of the LSI is initialized. Therefore, data held during normal operation can not be shifted out, and security data such as encryption key is prevented from being leaked.
In the above scan test, when the scan mode is set, the inside of the LSI is initialized and the security data is made unusable, and thus, reveal of the security data to the exterior is prevented.
For example, in the case where the security data such as encryption key is hardware-implemented, whether the encryption key functions normally or not may be tested using the encryption key itself. However, in the above scan test, as the security data such as encryption key is made unusable, it is not possible to carry out the scan test safely using the security data.